* MSM PCIe MSI controller - compatible: Usage: required Value type: Definition: Value to identify this is a MSM PCIe MSI controller - msi-controller: Usage: required Value type: Definition: Indicates that this is a MSM PCIe MSI controller node - reg: Usage: required Value type: Definition: Physical QGIC address (0x17a00040), MSI message address -interrupt-parent: Usage: required Value type: Definition: Phandle of the interrupt controller that services interrupts for this device -interrupts: Usage: required Value type: Definition: Array of tuples which describe interrupt lines for PCIe MSI -qcom,snps: Usage: optional Value type: Definition: Set if interrupt controller is Synopsys instead of QGIC ======= Example ======= /* QGIC */ pci_msi: qcom,pci_msi { compatible = "qcom,pci-msi"; msi-controller; reg = <0x17a00040 0x0 0x0 0x0 0xff>; interrupt-parent = <&pdc>; interrupts = , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , ; }; /* Synopsys */ pci_msi: qcom,pci_msi { compatible = "qcom,pci-msi"; msi-controller; reg = <0xa0000000 0x0>; interrupt-parent = <&intc>; interrupts = ; qcom,snps; };